In conventional MOSFET (metal on oxide field effect transistor) fabrication, silicide formation may be preceded by an implantation to amorphize exposed silicon surfaces of diffusion areas. However, in conventional self-aligned processes, the amorphizing implant may extend into and damage the crystalline nature of active channel regions of such a transistor. This has become a greater concern as MOSFET device geometries become smaller, since the thickness of a spacer separating the amorphizing implant from a channel is made thinner to enable transistor pitch scaling.
Silicide formed after the implant is typically closer to the channel and, as MOSFET scaling leads to shorter channel length devices, the risk of metal diffusion through defects in the channel region is high. Additionally, the use of a single metal species for silicidation may result in work functions that may not be adequately tuned to lower contact resistance for both NMOS and PMOS source/drain regions.